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2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
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2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
3.More rigorous design constraints, more standardized processes
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STD MODULADOR FSK COM 2 OSCILADORES de PONTE WIEN
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | teste100kHz | T1 | HDR-1X2/2.54 | 1 |
| 2 | teste1kHz | T2 | HDR-1X2/2.54 | 1 |
| 3 | testeGND | T3,T4 | HDR-1X2/2.54 | 2 |
| 4 | testeFSK | T5 | HDR-1X2/2.54 | 1 |
| 5 | POTENCIOMETRO DUPLO | .,. | POTENCIOMETRO DUPLO | 2 |
| 6 | 1k | R1,R6 | AXIAL-0.4 | 2 |
| 7 | 680 | R3,R2,R4,R5 | AXIAL-0.4 | 4 |
| 8 | 330 | R7 | AXIAL-0.4 | 1 |
| 9 | 1nF | C1,C2 | RAD-0.3 | 2 |
| 10 | 10nF | C3,C4 | RAD-0.3 | 2 |
| 11 | VS SIMETRICA | P1 | WJ2EDGVC-5.08-3P | 1 |
| 12 | CJMCU-74HC4051 | U3 | CJMCU-4051 | 1 |
| 13 | 3mm | LED1 | LED-5MM | 1 |
| 14 | trimpote 10k | SR1,SR2 | T67Y | 2 |
| 15 | , | D1,D2,D3,D4 | DO-41 | 4 |
| 16 | 741CP | U2,U1 | DIP-8 | 2 |
| 17 | Sinalquadrado | P2 | WJ2EDGVC-5.08-2P | 1 |
| 18 | Saida FSK | P3 | WJ2EDGVC-5.08-2P | 1 |
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