1.Easy to use and quick to get started
2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
4.For students, teachers, creators
1.Brand new interactions and interfaces
2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
3.More rigorous design constraints, more standardized processes
4.For enterprises, more professional users
Std EditionATmega EEPROM Programmer
Profile：Parallel EEPROM Programmer for 28C64B and 28C256 EEPROMs
License: CC-BY-SA 3.0
Parallel EEPROM Programmer for 28C64B and 28C256 based on ATmega8 featuring:
The heart of the EEPROM programmer is an ATmega8 microcontroller. The address bus of the EEPROM (up to 15 bit) is controlled via two daisy-chained 74HC595 shift registers using hardware SPI @ 8 Mbps. The data bus is controlled directly via the pins of the ATmega. Address and data bus are simultaneously driven to achieve the maximum data transfer rate. The data connection to the PC runs via the hardware UART interface of the ATmega transfering the data in binary format with up to 1 Mbps. A CH330N (or CH340N) converts the serial data for USB 2.0.
This EEPROM is a high-performance electrically erasable and programmable read-only memory. The device offers access times to 150 ns with power dissipation of just 440 mW. When the device is deselected, the CMOS standby current is less than 200 μA. The EEPROM is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. The end of a write cycle can be detected by data polling. Once the end of a write cycle has been detected a new access for a read or write can begin. An optional software data protection mechanism is available to guard against inadvertent writes. The EEPROM is ideally suited to replace (E)EPROMs in old 8-bit computers.
The EEPROM is accessed like a Static RAM. When !CE and !OE are low and !WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either !CE or !OE is high.
A low pulse on the !WE or !CE input with !CE or !WE low (respectively) and !OE high initiates a write cycle. The address is latched on the falling edge of !CE or !WE, whichever occurs last. The data is latched by the first rising edge of !CE or !WE. Once a byte write has been started it will automatically time itself to completion. The page write operation allows 1 to 64 bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write; the first byte written can then be followed by 1 to 63 additional bytes. Each successive byte must be written within 150 μs of the previous byte. All bytes during a page write operation must reside on the same page as defined by the state of the A6 - A14 inputs. For each WE high to low transition during the page write operation, A6 - A14 must be the same. The A0 to A5 inputs are used to specify which bytes within the page are to be written. The bytes may be loaded in any order and may be altered within the same load period. Only bytes which are specified for writing will be written; unnecessary cycling of other bytes within the page does not occur.
The EEPROM features DATA Polling to indicate the end of a write cycle. During a byte or page write cycle an attempted read of the last byte written will result in the complement of the written data to be presented on I/O7. Once the write cycle has been completed, true data is valid on all outputs, and the next write cycle may begin. DATA Polling may begin at anytime during the write cycle. In addition to DATA Polling the EEPROM provides another method for determining the end of a write cycle. During the write operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop toggling and valid data will be read. Reading the toggle bit may begin at any time during the write cycle.
On the microcontroller side, data is received via UART and written to the EEPROM according to the data sheet or vice versa. The programmer is controlled with simple commands, which are also sent via the serial interface:
|i||Print "EEPROM Programmer" (for identification)|
|v||Print firmware version|
|a 0100||Set address bus to 0100 (hex) (for test purposes)|
|d 0000 7fff||Print hex dump of memory addresses 0000-7fff (hex)|
|f 1000 1fff ff||Fill memory (1000-1fff) with value ff (hex)|
|r 0000 3fff||Read memory addresses 0000-3fff (hex) and send as binary data|
|p 0100 013f||Page write binary data to memory page 0100-013f (bytes must follow)|
|l||Lock EEPROM (enable write protection)|
|u||Unlock EEPROM (disable write protection)|
Any serial monitor (set BAUD rate to 1000000) can be used for control from the PC. However, in order to use the full capabilities, it is recommended to use the attached Python scripts. The script "eepromgui.py" offers a simple graphical user interface and functions for reading and writing binary files as well as for displaying the EEPROM content. The scripts have only been tested on Linux, but should work on all operating systems. A driver for the CH330N/CH340N may be required for Windows.
avrdude -c usbasp -p m8 -U lfuse:w:0x3f:m -U hfuse:w:0xd1:m -U flash:w:eeprom_programmer_m8.hex
This work is licensed under Creative Commons Attribution-ShareAlike 3.0 Unported License. (http://creativecommons.org/licenses/by-sa/3.0/)
|14||28C256||U5||DIP28 WIDE PACKAGE BIGHOLE||1|