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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

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STD BORIS_Proj

License: Public Domain

Mode: Editors' pick

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Update time: 2021-05-19 20:53:50
Creation time: 2021-04-14 17:22:28
Description

Boris project

Design Drawing
schematic diagram
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PCB
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ID Name Designator Footprint Quantity
1 vnh2sp30 U7 VNH2SP30-PACK 1
2 MAX3232ESE+T U5 SOIC-16_L9.9-W3.9-P1.27-LS6.0-BL 1
3 KLS2-301-5.00-02P-2S X13_IN+,X13_IN-,X3,X4 KLS2-301-5.00-02P-2S 4
4 X1_OUT_7V X1_OUT_7V KLS2-301-5.00-02P-2S 1
5 X5_OUT_5V X5_OUT_5V KLS2-301-5.00-02P-2S 1
6 X11_AKT X11_AKT KLS2-301-5.00-02P-2S 1
7 B3P-VH-FB-B (LF)(SN) X2_SERV,X3_YR,X4_YPR,X6_ASTP,X9_RYA,X10_GPS JST_XHP-3 6
8 HDR-M-2.54_1x1 J3,TX1,RX1,RST1,AREF1,3V3_1,12V_1,12V_2,GND_1,GND_2,3V3_2,TX2,RX2,RST2,AREF2,J4,J5,J2,J1 HDR-M-2.54_1X1 19
9 B16B-XH-A (LF)(SN) X8_LCD CONN-TH_B16B-XH-A-LF-SN 1
10 1m R1,R2,R3,R4,R5,R6,R7 L_AXIAL-0.4 7
11 Mega2560 Pro U1,U2 MEGA2560 PRO 2
12 HW-411 U3,U4 HW-411 2
13 B5P-VH-FB-B (LF)(SN) X12_COMP JST_XHP-4 1
14 0.1u C1,C2,C3,C4,C5 RAD-0.1 5
15 B7P-VH-FB-B (LF)(SN) X7_KEY XHPX-7_PCB 1

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