Open source license: Public Domain
This is an LTspice simulation of a discrete Quasi Low-Dropout High Ripple-Rejection Linear regulator that I designed. This circuit has a dropout voltage of 1V at 1A of load current and is optimised to have a ripple rejection of over 80dB at 100kHz, with the intention of using it along with a switching tracking pre-regulator.
(Interactive everycircuit simulation: https://everycircuit.com/circuit/5419103516622848/high-ripple-rejection-linear-regulator . Note, the everycircuit setup is slightly different from the LTspice setup.)
The circuit works by controlling the base current of Q1 by manipulating a constant current sink, made by the BJTs Q3 and Q4. This control scheme has the advantage over ordinary discrete voltage regulators in that the op amp can be powered by a fixed low-voltage supply (like 5V) and still output a voltage greater than 5V, as the series pass transistor is not directly driven by the output of the op amp.
LTspice simulation results:
++12.000V output for a 15V input with an input ripple of 500mVpp @ 100kHz++
++Output noise <50uVpp for the same setup++
++Dropout voltage <1V at 1A load current++
(.asc file available in the attachments section) (This circuit has not been tested on the breadboard)
SchematicOpen in editor