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STD TS151 - Z180 Linear Address ROM-RAM
Project Status:
Ongoing
License: CERN Open Hardware License
- 1
Description
Memory system for Z180
- 2x40 Backplane connector
- Linear address space: First half RAM, Second half ROM
- A19 selects RAM or ROM
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schematic diagram
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TS151_-_Z180_Linear_Address_ROM-RAM - Placement
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | Am29F040 | U1 | DIP-32-600-ELL | 1 |
| 2 | AS6C4008 | U2 | DIP-32-600-ELL | 1 |
| 3 | 100uF | C1 | CAP-D4.0XF1.5 | 1 |
| 4 | 0.1uF | C2,C3,C4,C5 | RAD-0.1 | 4 |
| 5 | Extended_Backplane | P1 | PIN_HEADER_ANGLED_2X39_PITCH2.54 | 1 |
| 6 | 74LS139N | U3 | DIP-16-300-ELL | 1 |
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