© 2022 EasyEDA Some rights reserved
Editor Version
×
Standard
1.Easy to use and quick to get started
2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
4.For students, teachers, creators
Profession
1.Brand new interactions and interfaces
2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
3.More rigorous design constraints, more standardized processes
4.For enterprises, more professional users
Description
Banked EPROM RAM Board
- EPROM can be enabled/disabled with write to register
- EPROM occupies first 16K of address space
- First or Second bank of 16K in EPROM can be selected
- Modified to use ZIFF Socket
Design Drawing
schematic diagram
（
1
/
）
PCB
（
1
/
）
Empty
| ID | Name | Designator | Footprint | Quantity | Mounted | |
|---|---|---|---|---|---|---|
| 1 | 27C256 | U1 | DIL28-6-ZIF_SOCKET | 1 | Yes | |
| 2 | Addr Select | P3 | HDR-8X2/2.54 | 1 | Yes | C68234 |
| 3 | 628128P | U2 | DIP-32-600-ELL | 1 | Yes | |
| 4 | 74ALS259N | U6 | DIP-16-300-ELL | 1 | Yes | |
| 5 | 100nF | C2,C3,C4,C5,C6 | RAD-0.1 | 5 | Yes | C46756 |
| 6 | 74ALS138N | U5 | DIP-16-300-ELL | 1 | Yes | |
| 7 | RC2014 Backplane | P1 | HDR-2.54-FX-1X38PW | 1 | Yes | C74252 |
| 8 | OUTPUTS HDR | P2 | SIP-4 | 1 | Yes | C59481 |
| 9 | 74ALS32N | U4,U3 | DIP-14-300-ELL | 2 | Yes |
Unfold
Project Members
1
2
Collect to album
Add to album
×
Loading...
reminder
×
Do you need to add this project to the album?