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2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
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2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
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STD Portas lógicas com transistores
License: Domínio público
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Description
# simulando portas lógicas com transistores
Design Drawing
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| ID | Name | Designator | Quantity |
|---|---|---|---|
| 1 | LED | LED1,LED2,LED3,LED4,LED5,LED6 | 6 |
| 2 | SPST_Open | S1,S2,S3,S4,S5,S6,S7,S8,S9,S10 | 10 |
| 3 | 100k | R1,R3,R8,R11,R14,R15 | 6 |
| 4 | 1K | R2,R4,R7,R10,R12,R16 | 6 |
| 5 | 100K | R5,R6,R9,R13 | 4 |
| 6 | 2N2222 | Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10 | 10 |
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