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Standard
1.Easy to use and quick to get started
2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
4.For students, teachers, creators
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1.Brand new interactions and interfaces
2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
3.More rigorous design constraints, more standardized processes
4.For enterprises, more professional users
Std EditionUNROMmst
License: MIT
Description
Simple scheme for connecting Altera Cyclone IV to Dendy/Famicom as UNROM mapper. Verilog code is available on GitHub
Documents
UNROM cart scheme
Open in editor| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | 0,1u | C1,C3,C4 | RAD-0.1 | 3 |
| 2 | Famicom Cart slot | P1 | DIP60 | 1 |
| 3 | Mirroring | P2 | HDR-3X1/2.54 | 1 |
| 4 | SN74LVC244ADBR | U1 | SOIC | 1 |
| 5 | AM29F010B-90 | U2 | DIP32 | 1 |
| 6 | 6264A-12 | U3 | DIP28-600 | 1 |
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