© 2024 EasyEDA Some rights reserved ISO/IEC
Brand new interactions and interfaces
Smooth support for design sizes of over 3W
devices or 10W pads
More rigorous design constraints, more
standardized processes
For enterprises, more professional users
Easy to use and quick to get started
The process supports design scales of 300
devices or 1000 pads
Supports simple circuit simulation
For students, teachers, creators
STD PT4115_v4
Mode:
Plata_PT4115_v4
Open in EditorPlata_PT4115_v3
Open in EditorPl_PT4115_v4.1
Open in EditorPl_PT4115_v3.1
Open in EditorPL_v4.1
Open in EditorID | Name | Designator | Footprint | Quantity |
---|---|---|---|---|
1 | 68uH | L3,L4,L1,L2 | IND-808040 | 4 |
2 | SS14 | D3,D4,D1,D2 | SMA(DO-214AC) | 4 |
3 | 100uF | C3,C4,C3-1,C4-1,C1,C2,C1-1,C2-1 | CAP-D6.3XH7.7 | 8 |
4 | Fm4115D | U3,U4,U1,U2 | SOT-89-5 | 4 |
5 | 1k | R3,R4,R1,R2 | 1206 | 4 |
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