Renesas based clock/ebook

1. Introduction to project functions

This project is an upgrade project of the summer training camp project (Project: # Eighth LC Electric Competition # Based on Renesas’ desktop clock design - JLC EDA open source hardware platform (oshwhub.com) ), based on the previous project A TF card module, SPI FLASH, EEPROM, and power detection module are added to realize forecast acquisition, network timing, computer communication and other functions. It is suitable for novices to use for advanced contact. This project is all open source. If necessary, you can contact us to obtain the source code (e2).

1. Display and set basic information such as time, year, month and day (the time can be adjusted manually or network time synchronization has been implemented);

2. Support memory card detection reading and writing (SPI mode);

3. Support WIFI connection, support the transmission of pictures and text with the computer through the network, and use the computer to update the font library through WIFI;

4. Support EEPROM and use EEPROM to save device information;

5. Support SPI FLASH to save fonts, pictures and other information;

6. Support weather acquisition, current day information and forecast for the next three days;

7. Obtain indoor temperature and humidity through DHT11;

8. Transmit pictures and update fonts through the host computer (computer).

2. Hardware part

It adopts Renesas F7RA2E1A72DFL chip, which involves power supply circuit, power detection module, download circuit, buck circuit, lithium battery charging circuit, indoor temperature and humidity collection uses DHT11 temperature and humidity sensor, the display module uses ST7735S 1.77-inch TFTLCD, and the communication module uses ESP-01S Wireless module (using AT mode communication, can communicate with the computer, update fonts and pictures through the computer), the rest include six independent buttons, buzzer module, EEPROM module, SPI FLASH module; in addition, the board leads to all GPIO pins , in addition to being used as a desktop clock, it can also be used as a core board/development board. The following is the schematic diagram and introduction of each module (only the new modules are introduced).

Power detection module

When ADC_EN is pulled low, VBAT is connected to the ADC, and power is collected through the ADC pin. When not pulled low, ADC_EN will be pulled high to save battery power.

SD card module

SD card module, the SD_CD here is not necessary. When the memory card is inserted, the SD_CD pin will be connected to the shell and is low level, but it is not pulled high here, which is not very stable. You can also check whether it is by reading and writing SD. There is a response to judge, so the SD_CD pin can not be used.

EEPROM module

Choose AT24C02, which can store 256 bytes and can be used to store the status of the clock device, wireless network passwords and other information to prevent data loss after shutdown.

SPI FALSH module

Choose 25Q64. The package here is SOP-8. Most of them seem to be SOP-8-225. The two pins are the same and the sizes are inconsistent. If you use it, please pay attention to the size, otherwise flying wires may be needed.

The following picture shows the complete schematic diagram:

Schematic diagram

The touch pins in the schematic diagram cannot be used. If you need to use the touch pins, you need to add an external power supply to pin 112. This is ignored during the design. You can modify it yourself if necessary.

PCB appearance:

PCB board front

PCB board reverse side

It should be noted that the typeC used here is Hanrong's product. When I purchased it, I found that the positive and negative poles of Hanrong's two-pin TYPEC are opposite to those of most domestic manufacturers. If you use Hanrong's TYPEC, please purchase Hanrong's TYPEC or modify the schematic diagram. (The positive and negative poles are connected in reverse. It is recommended to test before welding to prevent components from burning out).

3D front

3D reverse

Finished product picture:

Finished product picture

An additional layer of panels can be covered to cover more than part of the screen.

3. Software part

Main program flow chart

Flow chart of each module

Video introduction:

[Renesas clock/e-book production] https://www.bilibili.com/video/BV1gu4y1b7Pc?vd_source=8fbcb5e945ef64ba122b163c354a4880

If you need C++ code, you can also contact us. Currently, the host computer is a console program and MFC is under development.