Standard Edition, schematic:

To recreate (example), place a 3-pin component and apply net-labels P1.0, P1.1 and P1.2 and place Bus Entries.

Now place 3 resistors, R1, R2, R3: one end goes to common ground, the other ends get a bus-entry, and also net-labels P1.0, P1.1, P1.2.  Now connect the bus entries with a bus.  Design rule check passes.

Now rename the 3 resistors to R1.0, R1.1 and R1.2

Design Rule Check fails with "More than 1 netlabel is found in wire".