Hi,

I am having a problem with routing NRF5340-QKAA-R (aQFN94 Package) with JLCPCB Manufacturing Capabilities. However this part is on JLCPCB SMT Library.

According to the Datasheet of NRF5340-QKAA-R  Lead width is 0.2mm (0.25mm Max) and Lead pitch is 0.4mm. According to my

understanding, this makes it impossible to route a track between two leads without violating JLCPCB Clearance Requirements.

The only workaround for this problem I see is using Via in Pad(POFV) to place vias under the inner pads.

If I use 0.15(Drill)/0.25(Outer)mm Vias and place them directly on top of inner pads it still seems to be violating

JLCPCB Hole to hole clearance(Different nets) requirement.

Am I missing something here? Since this part is on JLCPCB SMT Library, I guess there should be a way to route this satisfying JLCPCB

manufacturing capablities.