Hi,

I am currently in the process of designing a 6-layer PCB and would like to take advantage of the free via-in-pad feature. However, I'm having difficulty setting up EasyEDA to configure the design rules for via-in-pad.

Free Via-in-Pad on 6-20 Layer PCBs with POFV

Could you please provide detailed instructions or a tutorial on how to configure the DRC settings for via-in-pad in EasyEDA? Specifically, I need guidance on:

1. Setting up DRC rules to allow via-in-pad.
2. Placing vias within pads correctly.

A step-by-step tutorial or any resources that could help me understand and apply these settings would be greatly appreciated.

Thank you for your assistance.

Best regards,
Juan