Sensor calibration and fusion testing platform

1. Project introduction

This project aims to create a platform to test the characteristics of IMU devices, get the calibration data, and test and tune different AHRS algorithms. 

Unmanned vehicles rely heavily on inertial measurement units to determine planar or spatial orientation. Multiple sensory fusion algorithms are developed to obtain the orientation, but even the best algorithms struggle or fail if the sensors are improperly calibrated.

As such, in this project, we would like to create an open hardware and software solution based on motorized gimbal architecture to test any inertial measurement unit, obtain the necessary calibration data and test and tune different fusion algorithms (like algebraic quaternion complementary filter, extended/unscented Kalman filter, Mahony and Madgwick filters) After which the sensor and the algorithms can easily be ported into a user application (like a drone, aeroplane, or smartwatch).

This project has three parts: 
1. The electronics - STM32-based platform with USB and Ethernet connection for better data transfer. 
2. The mechanical part - 3D printed gimbal structure that operates using DC brushed servos. 
3. The firmware and software - the MCU firmware will be written in STM32CubeIDE to operate the platform and create a communication bridge between the MCU and PC, and the software on the PC will be written in Python or Matlab to process the received data.

2. Design requirements

The circuit is designed to control and calibrate inertial measurement units (IMUs) and test AHRS algorithms using a motorized gimbal system. The microcontroller unit (MCU), based on the STM32H745, serves as the core processing unit, responsible for handling data acquisition, communication, and motor control. The circuit supports various interfaces like USB Type-C, Ethernet, SPI, I2C, and UART for high-speed data transfer, external communication, and peripheral integration. In addition, it provides precise power regulation and ESD protection for reliable operation in testing environments.

3. Circuit design

By designing the circuit, careful consideration was given to selecting components that ensure optimal performance, reliability, and efficiency. The primary goal of the design is to achieve a balance between processing power, connectivity, power management, and data storage, making this system ideal for embedded systems applications.

Each component was selected based on its technical specifications, compatibility with other parts, and suitability for the intended application. The STM32 microcontroller serves as the central processing unit, complemented by Ethernet connectivity, robust power regulation, and memory storage. The design integrates essential peripherals, with the USB-C interface providing power through its VBUS line, ensuring seamless power delivery, and the microSD interface offering additional storage for data logging and firmware updates, enhancing the system's functionality and usability.

3.0.1 Microcontroller Unit

At the heart of the design lies the STM32H745 microcontroller, a dual-core processor featuring a high-performance Cortex-M7 core and a low-power Cortex-M4 core. This microcontroller is selected for its advanced peripheral set, computational capabilities, and extensive memory. The dual-core architecture allows the concurrent execution of real-time tasks and complex algorithmic processing, essential for calibration and testing applications.

The microcontroller interfaces with various peripherals, including sensors, storage devices, communication modules, and servos, using a 3.3V regulated power supply. A 16MHz crystal oscillator is connected to the High-Speed External (HSE) pins, ensuring a stable and precise clock signal for the MCU's operations. The microcontroller also incorporates multiple high-speed communication protocols, such as SPI, I2C, UART, and RMII/MII, to ensure seamless integration with other components in the system.

3.0.2 Ethernet Connectivity

Ethernet communication is enabled through the LAN8740AI-EN Ethernet PHY transceiver. This component supports 10/100 Mbps communication speeds and connects to the STM32H745 microcontroller via the RMII or MII interface. The transceiver is clocked using a dedicated 25MHz crystal oscillator, ensuring synchronization and efficient data transfer. This Ethernet interface enables the platform to communicate with external systems, such as a PC, over a high-speed network. The RMII/MII interface utilizes signals such as TXD, RXD, TX\_EN, and RX\_ER for data transfer, while management functions are handled via MDC/MDIO pins. The design includes provisions for collision detection through the CRS and COL signals in MII mode.

3.0.3 Flash Memory and Storage

The platform integrates external Quad-SPI Flash memory, specifically the IS25LP512M-RHLE-TR chip, to extend the internal flash for larger firmware, calibration data, and logging purposes. This memory communicates with the microcontroller using a high-speed Quad-SPI interface, which includes four data lines (IO0–IO3), a clock signal (CLK), and a chip select line (CS). This configuration allows rapid read and write operations, essential for real-time applications.

In addition to Quad-SPI memory, the system includes an SD card slot compatible with the SDMMC or SPI interface. This slot provides expandable storage for logging large amounts of sensor data or updating firmware. The SDMMC interface operates using multiple data lines (DAT0–DAT3), a command line (CMD), and a clock line (CLK), ensuring efficient data transfer between the microcontroller and the SD card. The SD card slot is equipped with a push-push mechanism for user convenience, allowing easy insertion and removal during operation.

3.0.4 USB Type-C Interface

To provide both power and data transfer capabilities, the design incorporates a USB Type-C interface. This modern interface connects to the microcontroller via differential data lines D+ and D-, enabling high-speed communication conforming to USB 2.0 standards. The USB Type-C interface also includes a VBUS line that supplies power to the circuit, ensuring seamless integration of communication and power delivery in a compact form factor. The reversible nature of the USB Type-C connector simplifies user operation and improves the usability of the platform.

3.0.5 IMU Communication Interfaces

The platform is designed to accommodate a wide range of IMUs, which are critical for orientation and motion sensing. The system offers multiple communication protocols to interface with the IMU:

• SPI (Serial Peripheral Interface): For high-speed data acquisition, the SPI interface connects the microcontroller with the IMU through dedicated lines for data transmission (MOSI), data reception (MISO), clock signaling (SCLK).

• I2C (Inter-Integrated Circuit): For simpler applications requiring two-wire communication, the I2C interface connects to the IMU using SCL (Clock) and SDA (Data) lines.

• UART (Universal Asynchronous Receiver-Transmitter): For receiving data from the IMU, the UART interface connects to the IMU through the TX (Transmit) line from the IMU to the microcontroller's RX (Receive) line, providing a simple and reliable communication method for capturing sensor output.

3.0.6 Servo Control and Gimbal Operation

To physically manipulate the IMU during calibration, the platform controls three servo motors corresponding to the X, Y, and Z axes of motion, with an additional servo (W) available for expanded functionality. This configuration supports 3 Degrees of Freedom (3DOF) servo calibration while allowing for enhanced capabilities in applications such as drone or autonomous vehicle testing.The microcontroller generates precise Pulse Width Modulation (PWM) signals to control the servo motor positions. These signals are routed to dedicated servo control pins, ensuring accurate movement and orientation during calibration tasks.

A high-side load switch is integrated into the power supply line of the servos, allowing the microcontroller to enable or disable power to the servos as needed. This feature ensures safe operation, conserves power, and protects the circuit from potential overload.

3.0.7 Debugging and Programming Interface

For programming and debugging, the design includes a Serial Wire Debug (SWD) connector. This interface provides a streamlined method for loading firmware and diagnosing issues during development and operation. The SWD connector includes the following signals:

• SWCLK (Clock): Provides the timing signal for debugging communication.
• SWDIO (Data): Facilitates bidirectional data transfer between the microcontroller and the debugging tool.
• NRST (Reset): Allows the external tool to reset the microcontroller during programming or debugging.

Although JTAG is another widely-used debugging protocol, the design opts for SWD+Trace due to its suitability for the project's complexity and hardware requirements. SWD offers sufficient debugging capabilities while requiring fewer pins than JTAG, making it a more efficient choice. Additionally, as these are serial debugging interfaces, the dual-core microcontroller can be debugged using a single programmer through a daisy-chain configuration, further simplifying the debugging process.

This connector simplifies the development process, enabling rapid iteration and effective troubleshooting.

3.0.8 Power Supply Design

The platform relies on the LT8610EMSE#TRPBF, a high-efficiency step-down regulator, to provide a stable 3.3V supply to all components. This regulator supports an input voltage range of up to 42V and delivers an output current of 2.5A, making it suitable for the system's power requirements. The regulator operates at a switching frequency of up to 2 MHz.

However, designing at higher switching frequencies requires careful planning to minimize electromagnetic interference (EMI) and ensure the system does not emit unwanted signals. To address this, the design includes decoupling capacitors near critical components to filter noise and maintain reliable operation.

3.0.9Analog and Digital Conversions

The microcontroller's integrated Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) are included in the design for potential future applications. While not actively used in this implementation, these features provide flexibility for other applications that may require precise measurement of analog signals or the generation of accurate analog outputs for advanced control and testing scenarios.

3.1. Circuit composition - schematics

3.1.1 Microcontroller Unit

The STM32H745 microcontroller is the central component of the design, coordinating all operations and interfacing with various peripherals.

• Power Supply:

  • The microcontroller operates at a regulated 3.3V supply for its I/O pins, while the internal core functions at a lower voltage, depending on the power configuration. In the VOS1 configuration, the core operates at 1.62V when supplied by the internal LDO regulator, allowing the microcontroller to reach its maximum frequency of 400 MHz.
  • Multiple decoupling capacitors (C10, C11, C12, etc.) are placed near the power pins (VDD) to ensure a stable voltage supply and reduce noise.
  • The VSS pins are connected to the ground plane to provide proper current return paths and minimize ground noise.

• Clock Signal:

  • A 16MHz crystal (X1) is connected to the PH0-OSC_IN and PH1-OSC_OUT pins of the microcontroller.
  • Load capacitors (C8 and C9, typically 12pF–22pF) stabilize the crystal, ensuring precise and stable clock signals for system operations.

• Communication Interfaces:

  • SPI (Serial Peripheral Interface): SPI_MOSI, SPI_MISO, and SPI_SCLK pins provide high-speed communication with peripherals like flash memory and IMUs.
  • I2C (Inter-Integrated Circuit): I2C_SCL and I2C_SDA lines allow two-wire communication with sensors and other peripherals.
  • UART (Universal Asynchronous Receiver-Transmitter): The UART_TX and UART_RX pins facilitate asynchronous serial communication.
  • Ethernet RMII/MII: Pins such as TXD[0:1], RXD[0:1], TX_EN, and RX_ER interface with the Ethernet PHY for network communication.

• GPIO (General-Purpose Input/Output):

  • GPIO pins are utilized to control peripherals like LEDs (BLUELED1, REDLED2, etc.) and receive input from buttons (BUTTON1, BUTTON2).
  • Each GPIO pin is configured based on the specific application, such as digital output for LEDs or input for buttons.

3.1.2 Ethernet PHY

The Ethernet interface is implemented using the LAN8740AI-EN PHY transceiver, enabling high-speed network communication. This component facilitates reliable data exchange between the microcontroller and external systems.

• Data Lines:

  • Transmit (TXD[0:1]) and Receive (RXD[0:1]) lines handle the bidirectional flow of Ethernet data.
  • TX_EN signals when data is being transmitted, while RX_ER indicates receive errors.

• Clock Source:

  • A 25MHz crystal oscillator provides a precise clock signal for the PHY, ensuring accurate data transfer and synchronization.

• Management Interface:

  • The MDC (Management Data Clock) and MDIO (Management Data Input/Output) lines allow the microcontroller to configure and monitor the PHY.

• ESD Protection:

  • Electrostatic discharge (ESD) protection diodes are placed on Ethernet lines to safeguard against voltage spikes, enhancing the system's robustness.

• Additional Features:

  • Support for RMII and MII interfaces ensures flexibility in connecting to the microcontroller.

3.1.3 Power Supply

The power supply circuit is designed to provide a stable 3.3V regulated output to all components in the system. It ensures reliable operation while maintaining efficiency and protecting against electrical disturbances.

• DC-DC Converter:

  • The circuit utilizes an LT8610EMSE step-down (buck) converter to regulate the input voltage to 3.3V.
  • This high-efficiency converter supports an input voltage range of up to 42V, making it versatile for various power sources.

• Output Stabilization:

  • Decoupling capacitors are placed at the output to filter noise and provide a stable voltage supply to sensitive components like the microcontroller and Ethernet PHY.
  • An inductor smoothens the current, ensuring a steady power flow.

• Protection Mechanisms:

  • Electrostatic discharge (ESD) protection diodes are included on critical power lines to protect against voltage spikes.

• Efficiency:

  • The design ensures minimal heat generation, even during prolonged operation, due to the efficiency of the buck converter.

3.1.4 Connectors

The connectors in this design serve as the interface points for power, communication, and peripheral integration. They ensure seamless interaction between the system and external devices.

• USB Type-C Connector:

  • The USB communication operates via differential data lines (D+ and D-), routed with a controlled impedance of 90Ω to ensure signal integrity and reduce signal reflections. This design is optimized for USB 2.0 Full-Speed signaling, which does not require strict length matching as USB 2.0 High-Speed or USB 3.0 would.
  • The Configuration Channel (CC) lines utilize a fixed 5.1 kΩ pull-down resistor on the device (UFP) side to facilitate identification and power negotiation with the source (DFP). The source employs a pull-up resistor, whose value determines the power capability advertised by the port. For example, default USB power uses a 56 kΩ resistor, while higher currents, such as 1.5 A or 3.0 A at 5 V, require 22 kΩ or 10 kΩ resistors, respectively. These resistors form a voltage divider, allowing the source to detect the connected device and establish power delivery requirements. Since the device does not consume significant current, an advanced USB-PD (Power Delivery) circuit is not required, simplifying the design.
  • The VBUS line provides power to the circuit and is filtered using a combination of decoupling capacitors (C47, C48, C49) to stabilize voltage levels and reduce power supply noise.
  • ESD protection is integrated into the USB Type-C lines to safeguard against voltage surges and electrostatic discharge, ensuring robust operation in noisy environments or during handling.
  • The GND line provides a common ground reference for the system, minimizing electrical noise and ensuring stable power and signal operations across the circuit.
  • A ferrite bead (L3) is placed on the VBUS line to further suppress high-frequency noise.

• Ethernet RJ45 Connector:

  • The RJ45 Ethernet connector serves as the physical interface for network communication.
  • Transmit (TD+, TD-) and Receive (RD+, RD-) lines connect to the Ethernet PHY for data exchange.
  • Integrated LEDs on the RJ45 jack indicate link status and network activity.
  • The RJ45 connector includes integrated transformers to provide galvanic isolation, ensuring electrical separation between the Ethernet cable and the internal circuit. This prevents electrical surges or noise from damaging the internal components, enhancing reliability and safety.

• Servo Motor Connectors:

  • Dedicated connectors for servo motors allow control of X, Y, and Z axes in the gimbal system.
  • PWM signals from the microcontroller determine the servo positions, while power and ground lines supply the motors.

• SWD Connector:

  • Focused entirely on debugging and firmware development.

• IMU Communication:

  • Clearly separates SPI, I2C, and UART functionalities.

3.1.5 Memory

The memory in this design provides both non-volatile storage for firmware and data logging capabilities, ensuring reliable operation and data retention. It includes a Quad-SPI flash memory and an SD card interface.

• Quad-SPI Flash Memory:

  • The IS25LP512M-RHLE-TR flash memory chip interfaces with the microcontroller via a high-speed Quad-SPI connection.
  • The data lines (QSPI_IO0–QSPI_IO3) allow for parallel data transfer, facilitating rapid read and write operations crucial for real-time applications.
  • The QSPI_CLK line provides synchronization for data communication, while the QSPI_CS pin enables chip selection for targeted operations.
  • The chip supports speeds up to 133 MHz, making it suitable for high-performance tasks such as logging and calibration data storage.
  • To maintain data coherence at high speeds, the data and clock lines are impedance-matched to 50Ω and length-matched to minimize signal reflections and ensure reliable operation.
  • The non-volatile storage offers extended retention for firmware, logs, and configuration data.

• SD Card Interface:

  • The SD card slot offers expandable storage, providing a convenient solution for logging extensive datasets or updating firmware.
  • Communication with the microcontroller is established via data lines (DAT0–DAT3), a command line (CMD), and a clock line (CLK).
  • A push-push mechanism ensures user-friendly insertion and removal of the SD card.
  • ESD protection is integrated along the SD card interface to safeguard against voltage spikes and static discharge.
  • Similar to the Quad-SPI lines, the SD card data and clock lines are impedance-matched to 50Ω and length-matched to optimize high-speed data transfer reliability.

• Power Supply:

  • Both the Quad-SPI flash memory and SD card operate on a regulated 3.3V power supply.
  • Decoupling capacitors are strategically placed near these components to smooth power delivery and mitigate noise.

3.2. Circuit composition - PCB layout

The 6-layer PCB is a critical part of the IMU testing platform. It is designed to ensure high signal integrity, optimal power delivery, and easy access to all connectors. Each layer serves a distinct purpose, contributing to the overall functionality and reliability of the system.

3.2.1 Layer Stack-Up and Dimensions 

The layer stack-up of the PCB is engineered for optimal performance and manufacturability, ensuring efficient signal routing, thermal management, and power distribution. Each layer serves a specific purpose, as outlined below:

The design employs vias that extend through all PCB layers. Full-through vias were chosen over blind or buried vias for simplicity, cost-effectiveness, and reliable manufacturability. These vias ensure that power, ground, and high-speed signal are maintained across the stack-up.

3.2.2 Top Layer: Component Placement and Routing

The top layer is the primary component placement layer. Key components, including the STM32H745 microcontroller, Ethernet PHY, USB-C connector, and external interfaces (GPIO, UART, SPI, etc.), are strategically placed for optimal accessibility.

All connectors are located at the edges of the PCB to simplify external connections, enabling efficient debugging, assembly, and testing. Signal routing on this layer includes high-speed data lines (e.g., USB, SPI, and Ethernet) with short trace lengths to maintain signal integrity. Decoupling capacitors are positioned near ICs to reduce noise and stabilize power delivery.

3.2.3 Inner 1: Ground Plane

The Ground Plane offers a continuous copper layer for low-impedance grounding. This layer minimizes electromagnetic interference (EMI) and ensures a stable return path for high-speed signals routed on the Top Layer. Additionally, it provides thermal dissipation for heat-generating components like the microcontroller and the power regulator.

3.2.4 Inner 2: Power Plane

The Power Plane is responsible for distributing the 3.3V power supply to all components within the design. It ensures consistent voltage delivery to the critical elements of the circuit, such as the microcontroller, memory components, and communication interfaces.

It is important to note that there are two distinct power planes within this layer: VUSB (derived from the USB Type-C power input) and the regulated 3.3V plane. Proper separation of these planes is crucial to avoid interference and EMI issues. For instance, high-speed data lines must not cross over the boundaries of different power planes to prevent capacitive and inductive noise transfer.

The positioning of this power plane between two ground planes provides natural shielding. This layout minimizes electromagnetic interference and ensures a stable environment for signal propagation, eliminating the need for additional considerations when routing high-speed data lines.

3.2.5 Inner 3: Signal Routing

The fourth layer is an auxiliary signal routing layer. It is primarily used for connections that could not be accommodated on the Top Layer. The careful separation of signal lines prevents cross-talk, particularly for high-speed interfaces like USB and Ethernet.

3.2.6 Inner 4: Secondary Ground Plane

The Secondary Ground Plane serves as an additional ground plane. It reinforces EMI shielding, further stabilizing the grounding network for sensitive circuits. By combining this layer with Inner 1: Ground Plane, the PCB achieves noise reduction.

3.2.7 Bottom Layer: Secondary Routing

The Bottom Layer is used for sparse routing of remaining signal traces and secondary connections.

4. Mechanical design

5. Board bring-up - peripheral testing

6. Calibration procedure

6.1 Calibration firmware - STM32

6.2 Calibration software - Python

7. AHRS fusion testing procedure

7.1 Fusion firmware - STM32

7.2 Fusion data acquisition, comparison, unit tests - Python

8. Observations, problems, solutions, further development