Editor Version ×
recommended

Pro Edition

free

Brand new interactions and interfaces

Smooth support for design sizes of over 3W

devices or 10W pads

More rigorous design constraints, more

standardized processes

For enterprises, more professional users

Std Edition

Easy to use and quick to get started

The process supports design scales of 300

devices or 1000 pads

Supports simple circuit simulation

For students, teachers, creators

Ongoing

STD Digital Clock

Digital Clock

Project tags

License

License:

Mode:

Mode

Editors' pick

Editors' pick

  • 1.5k
  • 0
  • 0
Update time: 2023-07-06 22:42:15
Creation time: 2017-12-01 09:39:22
Description

Description

Empty
Design Drawing

Design Drawing

schematic diagram
1 /
PCB
1 /
The preview image was not generated, please save it again in the editor.
ID Name Designator Footprint Quantity
1 32.768kHz CRYSTAL OSC-49S-1 1
2 LM741CN SQUARE_WAVE_GENERATOR_AMPLIFIER DIP8 1
3 5KΩ WAVE_GEN_GAIN,CL_S0,CL_S1,CL_S2,CL_S3,CL_S4,CL_S5,CL_S6,CL_S7,CL_S8 RM065-V1 10
4 12 bit asynchronous counter 12_BIT_COUNT DIP16 1
5 12KΩ R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,RA,RB,RD,RD1 AXIAL-0.3 16
6 4bit_counter U1 DIP14 1
7 S0_7seg_driver S0_DRIVER,S1_DRIVER,S2_DRIVER,S3_DRIVER,S4_DRIVER,S5_DRIVER,S6_DRIVER,S7_DRIVER,S8_DRIVER DIP16 9
8 IRFZ44 MS0,MS1,MM0,MM1,MM2,MM3,MM4,MM5,MM6 TO-220AB 9
9 1N5819 CLOCK_D1,KEY_D1,CLOCK_D2,KEY_D2,CLOCK_D3,KEY_D3,CLOCK_D4,KEY_D4,CLOCK_D5,KEY_D5,CLOCK_D6,KEY_D6,RES_D1,RES_D2,RES_D3,CLOCK_D7,KEY_D7,CLOCK_D8,KEY_D8,CLOCK_D9,KEY_D9 DO-41 21
10 74HC04_HEX_INVERTER U2,U13 DIP14 2
11 6×6×4.5mm KEY1,KEY2,KEY3,KEY4,KEY5,KEY6,KEY7,KEY8,KEY9 KEY-6.0*6.0-2 9
12 1k RS1,RS2,RS3,RS4,RS5,RS6,RS7,RS8,RS9 2512 9
13 1uF CS1,NOT_CS1,CS2,NOT_CS2,CS3,NOT_CS3,CS4,NOT_CS4,CS5,NOT_CS5,CS6,NOT_CS6,CS7,NOT_CS7,CS8,NOT_CS8,CS9,NOT_CS9 RAD-0.2 18
14 20k NOT_RS1,NOT_RS2,NOT_RS3,NOT_RS4,NOT_RS5,NOT_RS6,NOT_RS7,NOT_RS8,NOT_RS9 0805 9
15 HD74LS32P U3,U12,U10 DIP14 3
16 HD74LS08P U4,U11 DIP14 2
17 S0 S0,S1,S2,S3,S4,S5,S6,S7,S8 LEDSEG_1_0.56_ANODE 9
18 P2N2222A BJT_S0,BJT_S1,BJT_M0,BJT_M1,BJT_M2,BJT_M3,BJT_M4,BJT_M5,BJT_M6 TO92-INLINE 9
19 1k RCL_S0,RCL_S1,RCL_S2,RCL_S3,RCL_S4,RCL_S5,RCL_S6,RCL_S7,RCL_S8 0805 9
20 S0_counter U5,U6,U7,U8,U9,U14,U15 DIP14 7
21 WJ2EDGVC-5.08-2P P1 WJ2EDGVC-5.08-2P 1

Unfold

Project Attachments

Project Attachments

Empty
Project Members

Project Members

Target complaint
Related Projects
Change a batch
Loading...

Comment

Add to album ×

Loading...

reminder ×

Do you need to add this project to the album?

服务时间

周一至周五 9:00~18:00
  • 0755 - 2382 4495
  • 153 6159 2675

服务时间

周一至周五 9:00~18:00
  • 立创EDA微信号

    easyeda

  • QQ交流群

    664186054

  • 立创EDA公众号

    lceda-cn