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Std edition Niklas R. Digital Delay
Profile：Beginner
License: GPL 3.0
Description
From Niklas Ronnberg Digital Delay circuit bend : http://familjenronnberg.se/~niklas/diy/eurorack/digital_delay/
Schematics was rewriten for home etching purposes, enjoy !
design drawing
schematic diagram
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PCB
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | 1N5819 | D1 | DO-41_BD2.4-L4.7-P8.70-D0.9-FD | 1 |
| 2 | HT8972 | U1 | DIP-16_L20.0-W6.4-P2.54-LS7.6-BL | 1 |
| 3 | 10u | C1,C14,C15,C13,C10 | CAP-D5.0×F2.0 | 5 |
| 4 | 47u | C3 | CAP-D5.0×F2.0 | 1 |
| 5 | 6.8n | C6,C7,C9 | RAD-0.1 | 3 |
| 6 | 100n | C2,C4,C5 | RAD-0.1 | 3 |
| 7 | 33n | C11 | RAD-0.1 | 1 |
| 8 | 560p | C8 | RAD-0.1 | 1 |
| 9 | 1n | C12 | RAD-0.1 | 1 |
| 10 | POWER | J1 | IDC-TH_16P-P2.54-V-R2-C8-S2.54 | 1 |
| 11 | I/O | J4 | HDR-M-2.54_1X2 | 1 |
| 12 | CLOCKED DELAY | J6 | HDR-M-2.54_1X2 | 1 |
| 13 | FEEDBACk | J5 | HDR-M-2.54_1X2 | 1 |
| 14 | IN | J2 | DC-IN-TH_DC-003A | 1 |
| 15 | OUT | J3 | DC-IN-TH_DC-003A | 1 |
| 16 | 100k | P2,P1 | VERTICAL POT | 2 |
| 17 | 4k7 | R6,R5,R4,R7,R2 | R_AXIAL-0.4 | 5 |
| 18 | 100k | R9 | R_AXIAL-0.4 | 1 |
| 19 | 2k7 | R10 | R_AXIAL-0.4 | 1 |
| 20 | 10k | R8,R3 | R_AXIAL-0.4 | 2 |
| 21 | 1k | R1 | R_AXIAL-0.4 | 1 |
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