Editor Version ×
Standard

1.Easy to use and quick to get started

2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

4.For enterprises, more professional users

Ongoing

STD NEX750G1

License: MIT

Mode: Editors' pick

Cloned from fsp6601

  • 486
  • 0
  • 0
Update time: 2022-01-29 12:14:02
Creation time: 2022-01-29 11:49:31
Description

NEX750G1 Reverse schematics

Design Drawing
schematic diagram
1 /
PCB
1 /
The preview image was not generated, please save it again in the editor.
ID Name Designator Footprint Quantity
1 ? C3,C41,C52,C56,C57,C58,C59,C60,C83,C90 C0603 10
2 0.1u C4,C5 C0603 2
3 ? D15,D17,D20,D21,D?,D? SOD-123FL_L2.6-W1.6-LS3.4-RD 6
4 PBSS4240TVL Q1,Q2 SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR 2
5 IPD060N03LG Q27,Q28 TO-252-2_L6.6-W6.1-P4.57-LS9.9-TL-CW 2
6 2R0 R1,R2,R61,R63 R0603 4
7 6.66k R59 R0603 1
8 10R R76 R0603 1
9 20k R77 R0603 1
10 47,5k R78 R0603 1
11 48,7k R79 R0603 1
12 15k R80 R0603 1
13 5.1k R81 R0603 1
14 8.2k R82 R0603 1
15 24k R83 R0603 1
16 ? R106 R0603 1
17 240 R114 R0603 1
18 TRANS T1 XFMR-SMD_VPT87DFB01B 1
19 6601 U1 PDIP-14 1
20 ? U2 XFMR-SMD_ATB322515-0110-T000 1

Unfold

Project Attachments
Empty
Project Members
Related Projects
Change a batch
Loading...
Add to album ×

Loading...

reminder ×

Do you need to add this project to the album?

服务时间

周一至周五 9:00~18:00
  • 0755 - 2382 4495
  • 153 6159 2675

服务时间

周一至周五 9:00~18:00
  • 立创EDA微信号

    easyeda

  • QQ交流群

    664186054

  • 立创EDA公众号

    lceda-cn