1.Easy to use and quick to get started
2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
4.For students, teachers, creators
1.Brand new interactions and interfaces
2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
3.More rigorous design constraints, more standardized processes
4.For enterprises, more professional users
STD Ultracompact minimalistic 6809 Computer V2
License: CERN Open Hardware License
Project source: Cloned from Ultracompact minimalistic 6809 Computer
A working 6809 Computer on a 5x5 cm PCB that could fit on your keychain ( and even has a hole for that :) )
This is version 2 that fixes some issues of the first version.
To fit this into 5x5 cm i used a 6 layer PCB as JLCPCB offers them in a promo for no additional cost compared to 4 layers at the moment of writing this, including free filled and plated vias and gold plating. This allows via in pad placement to save space. The top layer is a solid ground plane and layer 5 is a solid 5v plane leaving 4 planes for routing.
Parts were mostly selected based on what JLCPCB had in stock and could populate, as hand soldering the tiny smd parts would be a hard job.
Routing was only done by hand for more critical tracks and to guide the autorouter, which did most of the work.
The bottom side ICs are placed in precision female headers so the pads for the cpu socket can still be reached for soldering.
Normal sockets would block access.
I used the "combined" ROM from Jeff Tranter.
The 16K ROM code is placed in the upper half of the EPROM (0x4000 offset). The first 8K of the lower half are mapped to 0x8000 - 0x9FFF.
The expansion port has one chip select and enougth address lines for another 4K block to use.
I also created an 6821 expansion board fitting this one:
Attached is a short documentation (German only in the moment) and the ROM binary modified for hardware flow control.
|33||Single Header Pin||U9||SINGLE HEADER PIN||1|
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