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2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
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2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
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Description
Design Drawing
schematic diagram
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PCB
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | ULN2003D1013TR | U2 | SOIC-16_L9.9-W3.9-P1.27-LS6.0-BL | 1 |
| 2 | WJ15EDGRC-3.81-5P | P6 | CONN-TH_5P-P3.81_WJ15EDGRC-3.81-5P | 1 |
| 3 | TP-052-TJ | TP1,TP2,TP3 | TJ-052 | 3 |
| 4 | TLP290-4(GB-TP,E(T | U3 | SOIC-16_L9.9-W3.9-P1.27-LS6.0-BL | 1 |
| 5 | TPS54331DRG4 | U1 | D8_N | 1 |
| 6 | WJ15EDGRC-3.81-2P | P3,P4,P1,P5,P2 | CONN-TH_2P-P3.81_WJ15EDGRC-3.81-2P | 5 |
| 7 | 2nF | C5 | C0201 | 1 |
| 8 | 10pF | C4 | C0201 | 1 |
| 9 | 220uF | C7 | C0201 | 1 |
| 10 | 8.2nF | C3 | C0201 | 1 |
| 11 | 10uF | C2 | C0201 | 1 |
| 12 | 100nF | C1,C6 | C0201 | 2 |
| 13 | SMAJ33CA | D3 | SMA_L4.4-W2.6-LS5.0-BI | 1 |
| 14 | MBRA340T3G | D2,D1 | SMA_L4.3-W2.6-LS5.2-RD | 2 |
| 15 | G5NB-1A-E-DC5V | RLY3,RLY4,RLY1,RLY2 | RELAY-TH_G5NB-1A-E-DCXX | 4 |
| 16 | 1812L110/33MR | F1 | F1812 | 1 |
| 17 | 1.91K | R3 | R0201 | 1 |
| 18 | 2.2k | R12,R8,R9,R10,R11,R7 | R0201 | 6 |
| 19 | 10k | R4,R5,R6 | R0201 | 3 |
| 20 | 16.2K | R1 | R0201 | 1 |
| 21 | 10K | R2 | R0201 | 1 |
| 22 | 10uH | L1 | L0402 | 1 |
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