© 2024 EasyEDA Some rights reserved ISO/IEC
Brand new interactions and interfaces
Smooth support for design sizes of over 3W
devices or 10W pads
More rigorous design constraints, more
standardized processes
For enterprises, more professional users
Easy to use and quick to get started
The process supports design scales of 300
devices or 1000 pads
Supports simple circuit simulation
For students, teachers, creators
STD Randall 100
Mode:
fet
Open in Editorvero
Open in EditorNew PCB lakjsd
Open in Editortda2002
Open in Editorjfet adapter
Open in EditorID | Name | Designator | Footprint | Quantity |
---|---|---|---|---|
1 | 68k | R1 | R3 | 1 |
2 | 1M | R2 | R3 | 1 |
3 | 22k | R3 | R3 | 1 |
4 | 33k | R4,R5 | R3 | 2 |
5 | 1k | R6 | R3 | 1 |
6 | 4,7K | R7 | R3 | 1 |
7 | 2.2K | R8 | R3 | 1 |
8 | .01 | C1 | C1 | 1 |
9 | 220pf | C2 | C1 | 1 |
10 | .02 | C3 | C1 | 1 |
11 | .005 | C4 | C1 | 1 |
12 | 20pf | C5 | C1 | 1 |
13 | 10nf | C6,C9 | C1 | 2 |
14 | 1u | C8 | CP_8X13MM | 1 |
15 | 2N5639 | J1,J2,J3 | TO-92 | 3 |
16 | 50Ka | R9 | TRIM_POT_PTH | 1 |
17 | 10k | R10 | TRIM_POT_PTH | 1 |
18 | SIP1 | IN | HDR1X1 | 1 |
19 | 47k | R11,R12 | R3 | 2 |
20 | 560pf | C7 | C1 | 1 |
21 | 0.022 | C10 | C1 | 1 |
22 | 1nf | C11 | C1 | 1 |
23 | 50k | R13 | TRIM_POT_PTH | 1 |
24 | 1N4001 | D1,D2,D3,D4 | DO35-7 | 4 |
25 | SIP2 | P1 | HDR1X2 | 1 |
26 | 100k | R1 | TRIM_POT_PTH | 1 |
27 | opamp5pEE | U1 | DIP08 | 1 |
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