High-performance STM8 core, three-stage instruction pipeline, main frequency up to 16M 8k FLASH, 1k RAM, 128Byte true EEPROM 3 master clock sources to choose from: HSE, HSI, LSI low power mode: wait, active-halt, halt The peripheral clock can be turned off independently, power-up and power-down reset embedded 32 midrange vectors, up to 5 external interrupts 2 16-bit timers, an 8-bit basic timer SPI single-line interface (up to 8Mbit/s), IIC (up to 400kbit/s) UART (SmartCard, lrDa, LIN's main mode) 3-way 10-bit ADC, individual/continuous/buffered operating mode 5-way universal IO port, inline single-line download and simulation interface SWIM