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STD 74-LOGIC-CLOCK

License: GPL 3.0

Mode: Editors' pick

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Update time: 2022-01-14 09:14:13
Creation time: 2018-07-26 12:48:53
Description
Original design by Sergey Kiselev. http://www.malinov.com/Home/sergeys-projects/74xx-clock
Design Drawing
schematic diagram
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PCB
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ID Name Designator Footprint Quantity Mounted
1 74HCT4060 U1 DIP-16_300MIL 1 Yes C5997
2 74LS90 U11,U12,U13,U14,U15,U16 DIP-14_300MIL 6 Yes
3 74LS47 U5,U6,U7,U8,U9,U10 DIP-16_300MIL 6 Yes
4 7_segment_LED_common_anode DIS1,DIS2,DIS3,DIS4,DIS5,DIS6 1_DIGIT_LED_DIP10 6 Yes 110-68-593
5 470 R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,R16,R17,R18,R19,R20,R21,R22,R23,R24,R25,R26,R27,R28,R29,R30,R31,R32,R33,R34,R35,R36,R37,R38,R39,R40,R41,R42,R43,R44,R45,R46 0805 46 Yes C102016
6 Mini USB Female USB1 USB-MINI-2 1 Yes C46398
7 E6C1206YG LED1,LED2,LED3,LED4 LED-1206 4 Yes C15595
8 100nF C1,C2,C3,C4,C5,C6,C7,C8,C9,C10 0805 10 Yes C84714
9 32768Hz X1 XTAL 32KHZ 1 Yes
10 12pF C21 0805 1 Yes C107108
11 15M R47 0805 1 Yes C38267
12 330K R48 0805 1 Yes C104240
13 JML06-1-5P C20 JML06-1-5P 1 Yes C10476
14 CLK TP1 TEST_PROBE 1 Yes
15 K9-1267H SW1,SW2,SW3 K9-1267H 3 Yes C107262
16 470K R49,R50,R51,R52,R53 0805 5 Yes C102019
17 nSMD050 F1 1206 1 Yes C69688
18 74LS00 U2,U3,U4 DIP-14_300MIL 3 Yes

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