© 2024 EasyEDA Some rights reserved ISO/IEC
Brand new interactions and interfaces
Smooth support for design sizes of over 3W
devices or 10W pads
More rigorous design constraints, more
standardized processes
For enterprises, more professional users
Easy to use and quick to get started
The process supports design scales of 300
devices or 1000 pads
Supports simple circuit simulation
For students, teachers, creators
STD 6502 Single Board Computer
Mode:
6502 single board computer based on Grant Searle's Minimal Chip Count 6502 Computer wth some additions and changes.
ID | Name | Designator | Footprint | Quantity |
---|---|---|---|---|
1 | 6522A VIA | U3 | DIP40 | 1 |
2 | I/O | LED1 | LED-TH_BD3.0-P2.54-RD | 1 |
3 | FTDI SERIAL CONSOLE | H2 | HDR-TH_6P-P2.54-V | 1 |
4 | 62256 32K RAM | U4 | DIP-28_L35.6-W17.8-P2.54-LS15.2-BL | 1 |
5 | 330R | R2 | R_AXIAL-0.3 | 1 |
6 | 2K2 | R1,R5,R6,R4,R3,R7 | R_AXIAL-0.3 | 6 |
7 | EXPANSION HEADER | H4 | HDR-16X2/2.54 | 1 |
8 | I/O HEADER | H3 | HDR-16X2/2.54 | 1 |
9 | 68B50 ACIA | U1 | DIP24-600 | 1 |
10 | USB POWER JUMPER | H1 | HDR-TH_2P-P2.54-V | 1 |
11 | 27128 16K EPROM | U2 | DIP-28_L35.6-W17.8-P2.54-LS15.2-BL | 1 |
12 | PUSHBUTTON | SW1 | TACTILE-PTH-EZ | 1 |
13 | POWER | LED2 | LED-TH_BD3.0-P2.54-RD | 1 |
14 | 6502A CPU | U6 | DIP-40 | 1 |
15 | CPU CLOCK SELECT | H5 | HDR-TH_3P-P2.54-V | 1 |
16 | 1nF | C1 | RAD-0.1 | 1 |
17 | 0.1u | C2,C3,C4,C5,C6,C7,C8,C9,C10 | RAD-0.1 | 9 |
18 | 1.8432 MHz | Y1 | HC49US | 1 |
19 | 2 MHZ | OSC1 | DIP-14_L17.8-W10.2-P2.54-BL | 1 |
20 | 1K | R8 | R_AXIAL-0.3 | 1 |
21 | RESET | SW2 | TACTILE-PTH-EZ | 1 |
22 | 74LS04 | U5 | DIP-14_L17.8-W10.2-P2.54-BL | 1 |
23 | 74LS00 | U7 | DIP-14_L17.8-W10.2-P2.54-BL | 1 |
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