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GEN-P001-0-FPGA Module Cyclone 10 LP

STDGEN-P001-0-FPGA Module Cyclone 10 LP

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Public Domain

Creation time:2019-10-20 05:41:22Update time:2024-05-27 13:13:05

Description

Design Drawing

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BOM

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Attachments

OrderFile nameDownload times
1
2K Serial EEPROM - 21794G.pdf
10
2
Box Header - 11091.pdf
7
3
Crystal - 12MHz - ABM8G.pdf
6
4
Crystal - 25MHz - TSX-3225_en.pdf
5
5
Crystal - 100MHz - SiT2001B-datasheet_0.pdf
7
6
Cyclone 10LP - c10lp-51001.pdf
19
7
Cyclone 10LP - c10lp-51002.pdf
10
8
Cyclone 10LP - c10lp-51003.pdf
11
9
Cyclone 10LP Design Guidelines - an800.pdf
13
10
Cyclone 10LP Package - 04r00416-03.pdf
9
11
Cyclone 10LP Pin Connection Guidelines - pcg-01021.pdf
14
12
DC-DC Regulator - tps54331.pdf
8
13
Ethenet Gigabit PHY - ksz9031mnx.pdf
12
14
Linear Regulator - tps737.pdf
5
15
NOR Flash - MT25Q_QLHS_L_128_ABA_0.pdf
8
16
Quad Three State Buffer - cd74hct126.pdf
5
17
RJ45_w_magnetics_936263508_sd.pdf
7
18
USB FTDI - DS_FT232H.pdf
15
19
Schematic_FPGA Module Cyclone 10 LP - Lite_20200117151214.pdf
39
20
PCB_FPGA_Module_PCB - Assembly Top.pdf
21
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Intellectual Property Statement & Reproduction Instructions

This is an open-source hardware project. All intellectual property rights belong to the creator. The project is shared on the platform for learning, communication, and research only; any commercial use is prohibited. If your intellectual property rights are infringed on EasyEDA, please notify us by submitting relevant materials in accordance with the Rules for Complaints and Appeals of IPR Infringement.

Users must independently verify the circuit design and suitability when replicating this project. All risks and consequences are borne by the user, and the platform assumes no liability.

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