![](http://image.easyeda.com/pullimage/BXEqJwoT51wXfl2cKo2c0LRhhRgJp6SuEdVfefCS.jpeg)
RND-P007-0-Trion Display Board
STDRND-P007-0-Trion Display Board
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Mode:Full
License
:Public Domain
Creation time:2024-01-14 01:36:20Update time:2024-05-27 09:48:33
Description
A display board using a tiny FPGA to allow simple use of a 320x240 display.
The board currently has the following known issues:
- The beeper capacitor should be replaced with a 68ohm resistor
- The HyperRAM part is not connected to DDR capable IO within the Trion FPGA, making it incompatible with Efinix's provided IP core. To use it a custom PHY will need writing (and it will never reach as high bandwidth).
- The JTAG programming header is missing the CRESET_N and SS_N pins, these need to be added to improve debugging cabability
- The FPGA will not currently configure itself from Flash - still investigating this issue...
Otherwise, everything else is working fine!
Design Drawing
![](/_next/static/media/empty2.28562477.png)
BOM
![](/_next/static/media/empty1.f115c8c9.png)
![](/_next/static/media/clone.4d8f0c21.png)
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