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2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
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STD 32-channels by ATMEGA128 (without ewelink Module) v1
License: Public Domain
Mode: Editors' pick
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Update time：
2022-09-15 07:31:54
Creation time：
2022-06-21 03:37:56
Description
Board of 32 channels: -Relays (Just used NO & COM pins) -ATMEGA128 FARES
Design Drawing
schematic diagram
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | JL126-50002G01 | CN1,CN3,CN4,CN5,CN6,CN7,CN8,CN9,CN10,CN11,CN12,CN13,CN14,CN15,CN16,CN17,CN18,CN19,CN20,CN21,CN22,CN23,CN24,CN25,CN26,CN27,CN28,CN29,CN30,CN31,CN32,CN33,CN34,CN35,CN36 | CONN-TH_2P-P5.00_JL126-50002G01 | 35 |
| 2 | LED3MM | D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15,D16,D17,D18,D19,D20,D21,D22,D23,D24,D25,D26,D27,D28,D29,D30,D31,D32,D33 | LED_3MM | 33 |
| 3 | KH-DC-005B-2.5 | DC1 | DC-IN-TH_DC-005B-13A | 1 |
| 4 | 220S-1*2P H=8.5MM Ytype Gold-plated | H1 | HDR-TH_2P-P2.54-V-F | 1 |
| 5 | 220 | R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,R16,R17,R18,R19,R20,R21,R22,R23,R24,R25,R26,R27,R28,R29,R30,R31,R32,R33 | RES-TH_BD1.7-L3.5-P7.50-D0.5 | 33 |
| 6 | 0 | R34,R35,R36,R37,R38,R39,R40,R41,R42,R43,R44,R45,R46,R47,R48,R49,R50,R51,R52,R53,R54,R55,R56,R57,R58,R59,R60,R61,R62,R63,R64,R65 | RES-TH_BD1.9-L3.3-P7.30-D0.5 | 32 |
| 7 | SRD-05VDC-SL-C | RLY1,RLY2,RLY3,RLY4,RLY5,RLY6,RLY7,RLY8,RLY9,RLY10,RLY11,RLY12,RLY13,RLY14,RLY15,RLY16,RLY17,RLY18,RLY19,RLY20,RLY21,RLY22,RLY23,RLY24,RLY25,RLY26,RLY27,RLY28,RLY29,RLY30,RLY31,RLY32 | RELAY-TH_SRD-XXVDC-XL-C | 32 |
| 8 | ULN2003L-D16-T | U1,U2,U3,U4,U5 | DIP-16_L19.2-W6.6-P2.54-LS7.6-BL | 5 |
| 9 | ATMEGA128 Module (Fares) v2 | U6 | ATMEGA128 MODULE (FARES) | 1 |
| 10 | ESP32-WROOM-32 | U8 | NODE32S-DEVKITV1 | 1 |
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