OngoingFPGA Cyclone III Dev Board
PROFPGA Cyclone III Dev Board
License
:CERN Open Hardware License
Description
This board serves as the main computing board for several FPGA-related projects.
It is the first revision in an attempt to creatign a design that can read analog samples, store then in DRAM, and read them out for display over HDMI.
The Rev. A needs an external ADC module that has no analog front end.
Known issues:
- All green LEDs are too bright. Select higher dropper resistors for LED2, LED3, LED4, LED5, LED6, LED7.
- C101 and C105 need to be removed or not mounted! They cause high rippel in the 1V8 and 3V3_LDO rails, leading to destruction of the ADV7513 (HDMI IC).
- Push buttons need extra HW debouncing (capacitors) or filtering in your HDL design as the U2 (Schmitt trigger buffer) alone is not enough for debouncing.
- No silkscreen to indicate which programming port is JTAG and which is active serial.
- No mounting hole near the programming headers to absorb the force when the programming plugs are inserted.
- Silkscreen for positioning of ADC module is slightly off.
Design Drawing
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CloneProject Members
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Users must independently verify the circuit design and suitability when replicating this project. All risks and consequences are borne by the user, and the platform assumes no liability.
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