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Standard
1.Easy to use and quick to get started
2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
4.For students, teachers, creators
Profession
1.Brand new interactions and interfaces
2.Smooth support for design sizes of over 30,000 devices or 100,000 pads
3.More rigorous design constraints, more standardized processes
4.For enterprises, more professional users
STD 31e Serial and Clock
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License: GPL 3.0
Description
Design Drawing
schematic diagram
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PCB
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | 1M | R1 | AXIAL-0.3 | 1 |
| 2 | 1K | R2 | AXIAL-0.3 | 1 |
| 3 | 49S | X1 | HC-49S | 1 |
| 4 | 100nF | C1,C2,C3,C4 | RAD-0.1 | 4 |
| 5 | 2.54mm 1x40P | RC40_BUS | HDR-2.54-Z-1X40P | 1 |
| 6 | MC68B50CP | IC1 | DIP24-600 | 1 |
| 7 | 2k2 | R3,R4,R5 | AXIAL-0.3 | 3 |
| 8 | FTDI_DEVICE | JP1 | FTDI_DEVICE_SIDE | 1 |
| 9 | JUMPER_2p | JP4,JP2,JP3 | 1X02 | 3 |
| 10 | 74HCT04N | U1 | DIP14 | 1 |
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