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STD Fuzz Face PNP

Fuzz Face PNP

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Public Domain

License: Public Domain

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Update time: 2023-02-25 16:30:07
Creation time: 2022-12-25 10:28:02
Description

Description

Fuzz circuit, with input impedance and second transistor collector control. Designed to fit the dimensions of 1590B enclosures.

Design Drawing

Design Drawing

schematic diagram
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PCB
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ID Name Designator Footprint Quantity
1 9V 9V HDR1X2 1
2 2.2uf C1 CAP-D4.0×F1.5 1
3 22uf C2 CAP-D4.0×F1.5 1
4 0.01uf C3 RAD-0.1 1
5 333-2UYC/S530-A3 LED1 HDR-F-2.54_1X2 1
6 B1K P2-FUZZ OG-POTS_CABLE_POT_6MM 1
7 OC76 Q1,Q2 OC76 2
8 470 R1 R_AXIAL-0.4 1
9 33k R2 R_AXIAL-0.4 1
10 5k8 R3 R_AXIAL-0.4 1
11 1M R4 R_AXIAL-0.4 1
12 100k R5 R_AXIAL-0.4 1
13 1k R8 R_AXIAL-0.4 1
14 GND TP1 TEST_TESTPOINT 1
15 -4.5 TP2 TEST_TESTPOINT 1
16 -8.7 TP3 TEST_TESTPOINT 1
17 -0.2 TP4 TEST_TESTPOINT 1
18 -0.5 TP5 TEST_TESTPOINT 1
19 10KB TR1 RTRIM3362P 1
20 in U1 HDR-F-2.54_1X2 1
21 out U2 HDR-F-2.54_1X2 1
22 A50K VOLUME-I OG-POTS_CABLE_POT_6MM 1
23 A500K VOLUME-O OG-POTS_CABLE_POT_6MM 1
24 3P2T SW1 FOOT SWITCH 3P2T 1

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