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STD MOSFET series disconnect overvoltage protector

License: CC-BY-NC-SA 3.0

Mode: Editors' pick

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Update time: 2021-12-25 08:30:26
Creation time: 2015-10-05 21:32:31
Description
**For the Commodore 64 overvoltage protection applications, this design is superceded by Uberclamp:** **https://easyeda.com/example/Uberclamp_simulation-RzsmgyQ8q** Using a series MOSFET to disconnect the load from a power supply in the event of the power supply output voltage exceeding a preset limit is several orders of magnitude faster than using an electromechanical relay. Compared to similar circuits using an electromechanical relay as the series element, the reduced time to disconnect significantly reduces the overvoltage margin above the protection circuit trip point that can be applied to the load before the series switch element goes open circuit. This is demonstrated in the `MOSFET vs relay switching times` simulation schematic. Detailed timing of a typical relay is demonstrated in the `Relay timings` simulation. The inclusion of R_LATCH and D_LATCH makes the protected state latching so that the power supply has to be reduced to zero or disconnected before reconnecting with the overvoltage reduced to below the trip level for the MOSFET to reconnect the load. If R_LATCH and/or D_LATCH are omitted then the circuit is self-resetting: the series MOSFET will reconnect as soon as the overvoltage is reduced below the trip level. The series MOSFET has an on-resistance of 0.01 Ohms and is rated to 50 Amps and so for power supplies capable of delivering up to about 20W, is capable of surviving a direct short to ground at the output of the protection circuit. Longer term output short circuit protection is provided by an anti surge fuse on the input side. This same fuse in combination with a diode to ground also provides input side reverse polarity protection. ******** A TL431 shunt regulator is used as a precision comparator to monitor the input supply voltage with a trip level set by a pair of resistors. The output of the TL431 drives a PNP ZTX968 high gain, high current, low saturation transistor which is turned off below and on above the trip voltage. The collector of this transistor is pulled to ground through a resistor. The collector is also connected to the gate of a logic level P channel MOSFET. The source of this MOSFET is connected to the input supply through the fuse. The drain is connected to some parallel decoupling capacitance and then to the load. When the PNP is off the MOSFET is pulled to ground through the collector resistor and so is turned fully on with a gate-source voltage of -5V. Above the trip level the gate voltage is pulled hard up to the source connection and so turns off very quickly, removing power to the load. Under normal operating conditions, D_LATCH is reverse biased but on a over-voltage fault, it becomes forward biased as V(GATE) is pulled up to VCC. This then pulls the REF net up and so forces the TL431 output to pull low even when the voltage on the VCC net falls below 5V. The voltage on the VCC net has to fall below about 4.25V before the voltage on the REF net falls below 2.5V and so turns the TL431 off again. Without D_LATCH or R_LATCH, the TL431 tuns off again as soon as the voltage on VCC falls below the TRIP voltage of 5.727V. ******** For readers who would prefer not to register for a (free) EasyEDA account to run the simulations, images of the simulation WaveForm plots in .png format have been attached to this project. A zipped pdf copy of `MOSFET_vs_relay_timings.pdf` is also attached (it is zipped because EasyEDA does not accept pdf but does accept zipped attachments).
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ID Name Designator Footprint Quantity
1 SINE(0 {8.5*sqrt(2)} 50 0 0 90) V3 2P-5.0 1
2 PULSE(0 1 {time_to_fault} 1u 1u 5m) V5 2P-5.0 1
3 LM7805 U1 TO220 1
4 Voltage_Controlled_Switch S1 NONE 1
5 1N4001 D2,D1 DO35-7 2
6 SINE(0 {8.5*sqrt(2)} 50 0 0 270) V1 2P-5.0 1
7 4700u C1 CP_8X13MM 1
8 {5/Iload} RC1LOAD R3 1
9 {Cint} C6 CP_8X13MM 1
10 220n C3,C5 C_MLCC_RES_DIP_5.5x3mm_P5mm 2
11 1.3k R6,R4,R3,R2 RC07 4
12 1k R7,R1,R5,R_LATCH,R9 RC07 5
13 DI_BZT52C5V6 D3 SOD123 1
14 LED DFAULT LED3MM 1
15 LED D1VC64OK LED3MM 1
16 TL431ED U2 TL431AILP_TO92_TRIPOD 1
17 {Rtop} R2,R1 RC07 2
18 {Rbot} R3,R5 RC07 2
19 1p_DNF C4 C_MLCC_RES_DIP_5.5x3mm_P5mm 1
20 ZTX968 Q1 SOT23 1
21 100u C2 CP_8X13MM 1
22 2SJ652 M1 TO-220_H 1
23 {TRIP} V2,V4 2P-5.0 2
24 {ABSMAX} V4,V1 2P-5.0 2
25 1N4148 D_LATCH DO35-7 1
26 DI_1N5401 D4 DO35-7 1
27 Delay_fuse Ifuse = 2 Tdelay = 1m Rfuse = 1m F1 NONE 1
28 PULSE(5 9 100u 2m) V3 2P-5.0 1
29 {Rload} R_MOSFET_LOAD,R_RELAY_LOAD R3 2
30 2SJ652 M1 DPAK 1
31 10u C1,C2 C_MLCC_RES_DIP_5.5x3mm_P5mm 2
32 TL431ED U1 SOT23-3 1
33 RELAY_SPDT_EE RLY1 NONE 1
34 5 V1 2P-5.0 1
35 5 R_NO_LOAD,R_NC_LOAD R3 2
36 PULSE(0 1 0.1m 1u 1u 3m) V2 2P-5.0 1

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