Editor Version ×
Standard

1.Easy to use and quick to get started

2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

4.For enterprises, more professional users

Ongoing

STD PCA9555

License: GPL 3.0

Mode: Editors' pick

  • 626
  • 0
  • 1
Update time: 2022-07-26 14:55:54
Creation time: 2022-04-06 13:54:24
Description

Experimental only. Do not use.

Design Drawing
schematic diagram
1 /
PCB
1 /
The preview image was not generated, please save it again in the editor.
ID Name Designator Footprint Quantity
1 100nF C1,C2,C5 C0603 3
2 10uF C3,C4 C0805 2
3 6 Pack Module Pins J2 6 PACK MODULE PCB 1
4 HDR-IDC-2.54-2X9P P1 IDC-TH_18P-P2.54-V-R2-C9-S2.54 1
5 10K R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,R16,R17,R18,R19,R20,R21,R22 R0603 22
6 SDR_JUMP SJ1,SJ2,SJ3 SJ_2S 3
7 TXS0104EDR U1 SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL 1
8 PCA9555PW,118 U2 TSSOP-24_L7.8-W4.4-P0.65-LS6.4-BL 1
9 AMS1117-3.3_C347222 U3 SOT-223-4_L6.5-W3.5-P2.30-LS7.0-BR 1

Unfold

Project Attachments
Empty
Project Members
Target complaint
Related Projects
Change a batch
Loading...
Add to album ×

Loading...

reminder ×

Do you need to add this project to the album?

服务时间

周一至周五 9:00~18:00
  • 0755 - 2382 4495
  • 153 6159 2675

服务时间

周一至周五 9:00~18:00
  • 立创EDA微信号

    easyeda

  • QQ交流群

    664186054

  • 立创EDA公众号

    lceda-cn