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class D amplifier V2

STDclass D amplifier V2

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Public Domain

Creation time:2021-09-18 14:53:28Update time:2021-10-20 01:41:42

Description

The modulator section of this amplifier consist of a clock generator, low pass filter, comparator and non-inverting buffer. The input signal is biased to 2.5V and compared with an high frequency triangle wave to generate the PWM signal. The signal is then buffered before passing through a RCD network to generate dead time between the on/off pair. The gate driver drives the MOSFET gate to generate an amplifier version of the PWM. The PWM is then filtered using LC filter and finally outputs to a speaker.

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