Ongoingclass D amplifier V2
STDclass D amplifier V2
License
:Public Domain
Description
The modulator section of this amplifier consist of a clock generator, low pass filter, comparator and non-inverting buffer. The input signal is biased to 2.5V and compared with an high frequency triangle wave to generate the PWM signal. The signal is then buffered before passing through a RCD network to generate dead time between the on/off pair. The gate driver drives the MOSFET gate to generate an amplifier version of the PWM. The PWM is then filtered using LC filter and finally outputs to a speaker.
Design Drawing
The preview image was not generated, please save it again in the editor.BOM
Bom empty
CloneProject Members
Intellectual Property Statement & Reproduction Instructions
This is an open-source hardware project. All intellectual property rights belong to the creator. The project is shared on the platform for learning, communication, and research only; any commercial use is prohibited. If your intellectual property rights are infringed on EasyEDA, please notify us by submitting relevant materials in accordance with the Rules for Complaints and Appeals of IPR Infringement.
Users must independently verify the circuit design and suitability when replicating this project. All risks and consequences are borne by the user, and the platform assumes no liability.
Empty


Comment