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STD class D amplifier V2

class D amplifier V2

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Public Domain

License: Public Domain

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Update time: 2021-10-20 01:41:42
Creation time: 2021-09-18 14:53:28
Description

Description

The modulator section of this amplifier consist of a clock generator, low pass filter, comparator and non-inverting buffer. The input signal is biased to 2.5V and compared with an high frequency triangle wave to generate the PWM signal. The signal is then buffered before passing through a RCD network to generate dead time between the on/off pair. The gate driver drives the MOSFET gate to generate an amplifier version of the PWM. The PWM is then filtered using LC filter and finally outputs to a speaker.

Design Drawing

Design Drawing

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ID Name Designator Footprint Quantity
1 XTAL 4MHZ XTAL 1
2 100u C1,C20,C21,C37 CAP-D6.3×F2.5 4
3 100n C2,C16,C17,C30 RAD-0.2 4
4 10n C3,C6,C14,C15,C18,C23,C24,C29,C32,C33,C34 RAD-0.1 11
5 27p C4,C5 RAD-0.1 2
6 1n C7 RAD-0.1 1
7 2.2u C8,C9,C10,C11 CAP-D5.0×F2.0 4
8 68p C12,C13,C35,C36 RAD-0.1 4
9 1u C19,C28 RAD-0.1 2
10 K_2 PIN SCREW TERMINAL 5.08MM COPY CN1,CN2,CN3 ECO SCREW TERMINAL 5.00MM 2P AAA 3
11 ECO 3 Pin Screw Terminal 5.08mm CN4 ECO SCREW TERMINAL 5.08MM 3P AAA 1
12 UF4007_C84067 D1,D2,D3,D4,D5,D6 DO-41_BD2.4-L4.7-P8.70-D0.9-FD 6
13 1N5361BRLG D7 DIO-TH_BD3.5-L8.6-P12.60-D1.1-RD 1
14 IRF530N Q1,Q2,Q3,Q4 TO-220AB-3_L10.4-W4.6-P2.54-L 4
15 1K R1,R2 R_AXIAL-0.4 2
16 3.6k R3 R_AXIAL-0.4 1
17 1k R4,R5,R6,R7,R8,R9 R_AXIAL-0.4 6
18 1.5K R10,R11,R24,R25,RS1 R_AXIAL-0.4 5
19 1J 2W FILM R12,R13,R18,R20 R_AXIAL-0.6 4
20 10 R14,R15,R16,R17 R_AXIAL-0.4 4
21 1Meg RF1 R_AXIAL-0.4 1
22 74LS93 U2 DIP14 1
23 LM319N U3 DIP254P762X510-14 1
24 LM7805 U4 TO-220-3_L10.0-W4.5-P2.54-L 1
25 LM7810ACT U5 TO-220_VERTICAL 1
26 IR2110PBF_C2967 U6,U7 DIP-14_L20.0-W7.6-P2.54-LS7.6-BL 2
27 74HC04N U9 DIP-14_L19.2-W6.6-P2.54-LS10.9-BL 1
28 15*10.5*21H型散热块(黑色) U15,U16,U17,U18 HEATSINK-TH_L15.5-W10.5-XSD1226-005 4
29 3296W-1-104_C5035 VR1,VR2 RES-ADJ-TH_3296W 2
30 AUDIO DUAL GANG POTENTIOMETER_3 COPY U1 POTENTIOMETER AUDIO DUAL 1

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